As the density of integrated circuit (i.e., semiconductor) devices increases, the design rule associated therewith may decrease accordingly so that the area occupied, for example, by a memory cell in an integrated circuit memory device may be reduced. In a dynamic random access memory (DRAM), a capacitor in a memory cell may occupy a relatively small area but may still need some level of capacitance to allow data to be stored and retrieved. Accordingly, reductions in the margins associated with manufacturing of memory cells may influence the design of capacitors used in the respective memory cells.
It is known to employ a variety of 3-dimensional shapes for lower electrodes to reduce the size of capacitors so that a predetermined capacitance can be maintained. For example, it is known to form cylindrically shaped lower electrodes and capacitor-over-bit line (COB)-type cylindrically shaped lower electrodes along these lines.
Meanwhile, various techniques have been applied to increase capacitance per unit area. For example, some conventional metal-insulator-semiconductor (MIS) capacitors use a SiO2 dielectric layer, where the thickness of the dielectric layer is reduced, but the overall effective surface area of the electrode is increased by using a 3-dimensional structure. However, as the density of integrated circuit devices has increased, the use of SiO2 layers may reach some technical limit. It has been proposed to form MIM capacitors with electrodes of metals having a relatively large work function, such as TiN and Pt, to address the potential limits of the above approach (to MIS capacitors). In these types of MIM capacitors, a metal oxide having a high affinity for oxygen is usually used as a dielectric layer. For example, it is known to use a metal oxide of Ta2O5, Y2O3, HfO2, Nb2O5, TiO2, BaO, SrO, and BST, to form a dielectric layer of an MIM capacitor. It is also known to use HfO2, which has a high dielectric constant (i.e., high-k) of about 20 to 25 and a high band gap, as a dielectric layer. Unlike other high-k dielectric layers, an HfO2 layer may provide relatively good reliability and stability for dielectric materials in capacitors in integrated circuit memory devices.
In some conventional methods of forming a capacitor, a HfO2 dielectric layer is formed on a lower electrode and thermally treated at a high temperature of about 550 degrees Centigrade or greater, to treat oxygen deficiencies or defects in the HfO2 dielectric layer. However, a lower electrode may be oxidized during the high-temperature thermal process, which may result in reduced capacitance. Also, the thermal process may cause an increase in leakage current due to structural stress and an increase in contact resistance. Furthermore, if a capacitor dielectric layer in a highly integrated circuit memory device is thermally treated at a high temperature other structures, such as a transistor, may be seriously damaged.
Also, when an MIM capacitor is conventionally manufactured, an upper electrode may be formed using a Cl-containing source gas, such as TiCl4. However, a MIM capacitor of this type, which also includes a HfO2 dielectric layer, may have increased leakage current.